1 tm fn9065 IS-1825ASRH single event and total dose hardened, high-speed, dual output pwm the single event and total dose hardened IS-1825ASRH pulse width modulator is designed to be used in high frequency, switching power supplies in either voltage or current-mode configurations. the design includes a precision voltage reference, a low power start-up circuit, a high frequency oscillator, a wide-band error amplifier and a fast current-limit comparator. the use of proprietary process capabilities and unique design techniques results in fast propagation delay times and high output current over a wide range of output voltages. constructed with the intersil rad-hard silicon gate (rsg) dielectrically isolated bicmos process, these devices are immune to single event latch-up and have been specifically designed to provide a high level of immunity to single event transients. all specified parameters are guaranteed and tested for 300krad(si) total dose performance. detailed electrical specifications for these devices are contained in smd 5962-02511. a ?hot-link? is provided on our website for downloading the smd. pinout is1-1825asrh (cdip2-t16 sbdip) top view is9-1825asrh (cdfp4-f20 flatpack) top view features ? electrically screened to dscc smd # 5962-02511 ? qml qualified per mil-prf-38535 requirements ? radiation environment - total dose . . . . . . . . . . . . . . . . . . . . 300krad(si) (max) - latch-up immune . . . . . . . . . . . . . dielectrically isolated - seu immune . . . . . . . . . . . let=35mev/mg/cm 2 (max) ? oscillator frequency . . . . . . . . . . . . . . . . . . . .1mhz(max) ? high output drive current . . . . . . . . . . . . . . . 1a peak(typ) ? low start-up current . . . . . . . . . . . . . . . . . . . 300ua(max) ? undervoltage lockout - start threshold . . . . . . . . . . . . . . . . . . . . . . . .8.8v(max) - stop threshold . . . . . . . . . . . . . . . . . . . . . . . . 7.6v(min) - hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . 300mv(min) ? improved soft-start function compared with commercial 1825a types ? trimmed oscillator discharge current ? pulse-by-pulse current limiting ? latched overcurrent comparator with full cycle restart ? programmable leading edge blanking applications ? voltage or current-mode switching power supplies ? control of high current mosfet drivers ? motor speed and direction control 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 inv non-inv e/a out clk/leb rt ct ss ramp vref out b vc pgnd out a gnd ilim/sd vcc 2 3 4 5 6 7 8 120 19 18 17 16 15 14 13 nc inv n on-inv e/a out c lk/leb rt ct ramp 9 10 12 11 ss nc vref vcc out b pgnd vc vc pgnd out a gnd ilim/sd ordering information ordering number internal mkt. number temp. range ( o c) 5962f0251101qec is1-1825asrh-8 -50 to 125 5962f0251101qxc is9-1825asrh-8 -50 to 125 5962f0251101vec is1-1825asrh-q -50 to 125 5962f0251101vxc is9-1825asrh-q -50 to 125 is1-1825asrh/proto is1-1825asrh/proto -50 to 125 is9-1825asrh/proto is9-1825asrh/proto -50 to 125 data sheet february 2002 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a trademark of intersil americas inc. copyright ? intersil americas inc. 2002. all rights reserved
2 all intersil u.s. products are manufactured, assembled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com die characteristics die dimensions: 4310 m x 5840 m (170 mils x 230 mils) thickness: 483 m 25.4 m (19 mils 1 mil) interface materials glassivation type: phosphorus silicon glass (psg) thickness: 8.0ka +/- 1.0ka top metallization type: alsicu thickness: 16.0ka +/- 2ka substrate: radiation hardened silicon gate, dielectric isolation backside finish: silicon assembly related information substrate potential: unbiased (di) additional information worst case current density: <2.0 x 10 5 a/cm 2 transistor count: 585 metallization mask layout IS-1825ASRH vc vc vref inv non-inv e/a out clk/leb rt ct ramp ss ilim/sd ognd gnd out a pgnd pgnd out b vcc notes: 1. both the ognd (oscillator ground) and the gnd (control circuit ground) pads must be bonded to ground. these pads are both bonded to the gnd pin on the packaged devices. 2. all double-sized bond pads must be double bonded for current sharing purposes.
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